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a u s t ri a m i c r o s y s t e m s
A S 11 0 8
4-Digit LED Display Driver
D a ta S he e t
1 General Description
The AS1108 is a compact display driver for 7-segment numeric displays of up to 4 digits. The device can be programmed via SPI, QSPI, and Microwire as well as a conventional 4-wire serial interface. The device includes an integrated BCD code-B/HEX decoder, multiplex scan circuitry, segment and display drivers, and a 32-bit memory. Internal memory stores the LED settings, eliminating the need for continuous device reprogramming. Every segment can be individually addressed and updated separately. Only one external resistor (RSET) is required to set the current through the LED display. LED brightness can be controlled by analog or digital means. The device can be programmed to use the internal code-B/HEX decoder to display numeric digits or to directly address each segment. The AS1108 features an extremely low shutdown current of typically 3A, and an operational current of less than 500A. The number of digits can be programmed, the device can be reset by software, and an external clock is also supported. Additionally, segment blinking can be synchronized across multiple drivers. The AS1108 provides several test modes for easy application debugging. The device is available in a 20-pin DIP and a 20-pin SOIC package.
2 Key Features
! ! ! ! ! ! ! ! ! ! ! ! !
10MHz SPI-, QSPI-, Microwire-Compatible Serial I/O Individual LED Segment Control Segment Blinking Control (can be synchronized across multiple drivers) Hexadecimal- or BCD-Code/No-Decode Digit Selection 3A Low-Power Shutdown Current (typ; data retained) Extremely Low Operating Current 0.5mA in Open-Loop Digital and Analog Brightness Control Display Blanked on Power-Up Drive Common-Cathode LED Displays Supply Voltage Range: +2.7 to +5.5V Software Reset Optional External Clock Packages: - 20-pin DIP - 20-pin SOIC
3 Applications
The AS1108 is ideal for bar-graph displays, instrumentpanel meters, LED matrix displays, dot matrix displays, set-top boxes, white goods, professional audio equipment, medical equipment, industrial controllers and panel meters.
Figure 1. Typical Application Diagram
+5V 9.53k VDD ISET DIN LOAD/CSN CLK GND GND 4-Digit Microprocessor Display DIG0 to DIG3 4 Digits
I/O I/O SCK Microprocessor
AS1108
8 Segments SEG A to G SEP DP
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AS1108 Data Sheet
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4 Absolute Maximum Ratings
Stresses beyond those listed in Table 1 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 5 Electrical Characteristics on page 3 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 1. Absolute Maximum Ratings Parameter VDD Voltage (with respect to GND) DIN, CLK, LOAD/CSN All Other Pins DIG 0:DIG 3 Sink Current SEG A:SEG G, SEG DP Continuous Power Dissipation (TAMB = +85C) Narrow Plastic DIP Wide SOIC 0 -65
1
Min -0.3 -0.3 -0.3
Max 7 7 7 or VDD + 0.3 500 100 1066 941 +70 +150 +260 +260
Units V V V mA mA mW mW C C C C % V V mA
Notes
Current
Derate 13.3mW/C above +70C Derate 11.8mW/C above +70C
Operating Temperature Ranges (TMIN toTMAX) Storage Temperature Range Package Body Temperature (Wide SOIC) Soldering Temperature (Narrow DIP) Humidity Electrostatic Discharge
3 2
5 Digital Outputs All Other Pins
4
85 1000 1000 200
Non-condensing
Latch-Up Immunity
All pins. Except pin 11: 180mA.
1. The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020C "Moisture/Reflow Sensitivity Classification for non-hermetic Solid State Surface Mount Devices". 2. Specified according JESD22-B106 "Resistance to Soldering Temperature for Through-Hole Mounted Devices". 3. Norm: MIL 883 E method 3015. 4. Norm: JEDEC 17.
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AS1108 Data Sheet
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5 Electrical Characteristics
Conditions: VDD = 2.7 to 5.5V, RSET = 9.53k1%, TAMB = TMIN to TMAX (unless otherwise specified). Table 2. Electrical Characteristics Parameter Operating Supply Voltage Shutdown Supply Current Operating Supply Current Display Scan Rate Digit Drive Sink Current Segment Drive Source Current Segment Drive Current Matching Digit Drive Source Current Segment Drive Sink Current Slow Segment Blink Period (ON phase, Internal Oscillator) Fast Segment Blink Period (ON phase, Internal Oscillator) Fast or Slow Segment Blink Duty Cycle (Guaranteed by design) Table 3. Logic Inputs/Outputs Characteristics Parameter Input Current DIN, CLK, LOAD/CSN Logic High Input Voltage Logic Low Input Voltage Symbol IIH, IIL VIH VIL Conditions VIN = 0V or VDD VDD = 5.0V 10% VDD = 3.0V 10% DOUT, ISOURCE = -1mA, VDD = 5.0V 10% DOUT, ISOURCE = -1mA, VDD = 3.0V 10% DOUT, ISINK = 1.6mA DIN, CLK, LOAD/CSN Min -1 0.7 x VDD Typ Max 1 0.8 0.6 VDD - 1 V VDD - 0.5 0.4 1 V V Unit A V V Symbol VDD IDDSD IDD fOSC IDIGIT ISEG ISEG IDIGIT ISEG tSLOWBLINK tFASTBLINK Digit off, VDIGIT = (VDD - 0.3V) Segment off, VSEG = 0.3V -2 5 0.64 0.32 49.9 1 0.5 50 1.65 0.83 50.1 All digital inputs at VDD or GND, TAMB = +25C RSET = open circuit. All segments and decimal point on; ISEG = -40mA. 4 digits scanned VOUT = 0.65V VDD = 5.0V, VOUT = (VDD -1V) 1000 320 -30 -40 3.0 -45 330 1600 2600 Conditions Min 2.7 Typ 5.0 Max 5.5 10 1 mA Hz mA mA % mA mA s s % Unit V A
Output High Voltage Output Low Voltage Hysteresis Voltage Table 4. Timing Characteristics
VOH VOL VI
Parameter CLK Clock Period CLK Pulse Width High CLK Pulse Width Low CSMFall-to-CLK Rise Setup Time (AS1108 SPI-programmed) CLK Rise-to -LOAD/CSN Rise Hold Time DIN Setup Time DIN Hold Time Output Data Propagation Delay LOAD Rising Edge-to-Next Clock Rising Edge Minimum LOAD/CSN Pulse High Data-to-Segment Delay
Symbol tCP tCH tCL tCSS tCSH tDS tDH tDO tLDCK tCSW tDSPD
Conditions
Min 100 50 50 25 0 25 0
Typ
Max
Unit ns ns ns ns ns ns ns ns ns ns ms
CLOAD = 50pF 50 50
25
2.25
Note: See Figure 9 on page 6 for additional timing information.
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AS1108 Data Sheet
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6 Typical Operating Characteristics
VDD = 5V, RSET = 9.53k, TAMB = 25C (unless otherwise specified). Figure 2. Scan Frequency vs.Temperature
1980 1960 1940 FOSC (Hz) 1920 1900 1880 1860 -40 -20 0 20 TAMB (C) 40 60 80 FOSC (Hz)
Figure 3. Scan Frequency vs. VDD
1960 1940 1920 1900 1880 1860 1840 1820 1800 2 3 4 VDD (V) 5 6
Figure 4. ISEG vs. Temperature
50 45 40 35 ISEG (mA) 30 25 20 15 10 5 0 -40 -20 0 20 TAMB (C) 40 60 80
Figure 5. ISEG vs. VDD
60 50
VDD = 5V, VOUT = 2.4V VDD = 5V, VOUT = 4V
40 ISEG (mA)
VOUT = 1.7V
30
VDD = 2.7V, VOUT = 2V VDD = 2.7V, VOUT = 2.4V
VOUT = 4V
20 10 0 2 2.5 3 3.5 4 4.5 5 5.5 6 VDD (V)
VOUT = 2.4V
Figure 6. ISEG vs. VOUT
50 45 40 35 ISEG (mA) 30 25 20 15 10 5 0 0 0.5 1 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 5
Figure 7. ISEG vs. VOUT
VDD = 2.7V
RSET = 10k
25
RSET = 10k
20 15
RSET = 20k
ISEG (mA)
RSET = 20k
10
RSET = 40k RSET = 40k
5 0 0 0.5 1 1.5 VOUT (V) 2 2.5
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AS1108 Data Sheet
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Figure 8. ISEG vs. RSET
60
VOUT = 2.4V
50 40 ISEG (mA) 30 20
VOUT = 4V VOUT = 2V VDD = 5V
10
VOUT = 1.7V
0 0 10 20
VDD = 2.7V
30 40 50 60 70 80
RSET (k )
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AS1108 Data Sheet
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Serial-Addressing Format
7 Detailed Description
Serial-Addressing Format
Programming the AS1108 is accomplished by writing to the device's internal registers (see Digit- and Control-Registers on page 7) via the 4-wire serial interface. A programming sequence consists of 16-bit packages as depicted in Table 5. The data is shifted into the internal 16-bit register with the rising edge of the CLK signal. With the rising edge of the LOAD/CSN signal the data is latched into a digit- or control-register. The LOAD/CSN signal must go high after the 16th rising clock edge. The LOAD/CSN signal can also come later but this must happen just before the next rising edge of CLK, otherwise the data will be lost. The contents of the internal shift register are applied 16.5 clock cycles later to pin DOUT. The data is clocked out at the falling edge of CLK. The first 4 bits (D15:D12) are "don't care" settings, bits D11:D8 contain the register address, and bits D7:D0 contain the data. The first bit is D15, the most significant bit (MSB). The exact timing is shown in Figure 9. Table 5. 16-Bit Serial Data Format D15 X D14 X D13 X D12 X D11 D10 D9 D8 D7 Register Address (see Table 6) MSB D6 D5 D4 D3 Data D2 D1 D0 LSB
Initial Power-Up
On initial power-up, the AS1108 registers are reset to their default values, the display is blanked, and the device goes into shutdown mode. All registers should be programmed for normal operation at this time. Note: The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control Register (see page 10) is set to the minimum values. Figure 9. Interface Timing
LOAD/ CSN
tCSH tCSS tCP tCL tCH tLDCK
tCSW
CLK
tDS
tDH
DIN
D15
D14
D1
D0
tDO
DOUT
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AS1108 Data Sheet
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Shutdown Mode
Shutdown Mode
The AS1108 features a shutdown mode, consuming only 10A (max) current. Shutdown mode is entered via a write to the Shutdown Register (see Table 7). At that point, all segment current sources are pulled to ground and all digit drivers are connected to VDD, so that all segments are blanked. Note: During shutdown mode the Digit-Registers maintain their data. Shutdown mode can either be used as a means to reduce power consumption or for generating a flashing display (repeatedly entering and leaving shutdown mode). For minimum supply current in shutdown mode, logic input should be at GND or VDD (CMOS logic level). The device needs typically 250s to exit shutdown mode, and during shutdown mode the AS1108 is fully programmable. Only the display test mode (see page 9) overrides shutdown mode. When entering or leaving shutdown mode, the Feature Register is reset to its default values (all 0s) when Shutdown Register bit D7 (page 8) = 0. When bit D7 = 1, the Feature Register is left unchanged when entering or leaving shutdown mode. Note: If the AS1108 is used with an external clock, Shutdown Register bit D7 should be set to 1 when writing to the Shutdown Register.
Digit- and Control-Registers
The AS1108 contains four Digit-Registers and six control-registers, which are listed in Table 6. All registers are selected using a 4-bit address word, and communication is done via the serial interface.
! !
Digit Registers - These registers are realized with an on-chip 32-bit memory. Each digit can be controlled directly without rewriting the whole register contents. Control Registers - These registers consist of decode mode, display intensity, number of scanned digits, shutdown, display test and features selection registers.
Table 6. Register Address Map Register No-Op Digit 0 Digit 1 Digit 2 Digit 3 Decode-Mode Intensity Control Scan Limit Shutdown N/A Feature Display Test HEX Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF Address D15:D12 X X X X X X X X X X X X D11 0 0 0 0 0 1 1 1 1 1 1 1 D10 0 0 0 0 1 0 0 0 1 1 1 1 D9 0 0 1 1 0 0 1 1 0 0 1 1 D8 0 1 0 1 0 1 0 1 0 1 0 1 Page 11 N/A N/A N/A N/A 8 10 10 8 N/A 11 9
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AS1108 Data Sheet
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Digit- and Control-Registers
Shutdown Register (0xXC)
The Shutdown Register controls AS1108 shutdown mode (see Shutdown Mode on page 7). Table 7. Shutdown Register Format (Address (HEX) = 0xXC)) Mode Shutdown Mode, Reset Feature Register to Default Settings Shutdown Mode, Feature Register Unchanged Normal Operation, Reset Feature Register to Default Settings Normal Operation, Feature Register Unchanged HEX Code 0x00 0x80 0x01 0x81 Register Data D7 0 1 0 1 D6 X X X X D5 X X X X D4 X X X X D3 X X X X D2 X X X X D1 X X X X D0 0 0 1 1
Decode Enable Register (0xX9)
The Decode Enable Register sets the decode mode. BCD/HEX decoding (either BCD code - characters 0:9, E, H, L, P, and -, or HEX code - characters 0:9 and A:F) is selected by bit D2 (page 11) of the Feature Register. The Decode Enable Register is used to select the decode mode or no-decode for each digit. Each bit in the Decode Enable Register corresponds to its respective display digit (i.e., bit D0 corresponds to digit 0, bit D1 corresponds to digit 1 and so on). Table 9 lists some examples of the possible settings for the Decode Enable Register bits. Note: A logic high enables decoding and a logic low bypasses the decoder altogether. When decode mode is used, the decoder looks only at the lower-nibble (bits D3:D0) of the data in the Digit-Registers, disregarding bits D6:D4. Bit D7 sets the decimal point (SEG DP) independent of the decoder and is positive logic (bit D7 = 1 turns the decimal point on). Table 9 lists the code-B font; Table 10 lists the HEX font. When no-decode mode is selected, data bits D7:D0 of the Digit-Registers correspond to the segment lines of the AS1108. Table 11 shows the 1:1 pairing of each data bit and the appropriate segment line. Table 8. Decode Enable Register Format (Address (HEX) = 0xX9)) Decode Mode No decode for digits 3:0 Code-B/HEX decode for digit 0. No decode for digits 3:1 Code-B/HEX decode for digits 3:0 HEX Code 0x00 0x01 0xFF D7 X X X D6 X X X Register Data D5 D4 D3 D2 X X 0 0 X X 0 0 X X 1 1 D1 0 0 1 D0 0 1 1
Figure 10. Standard 7-Segment LED Intensity Control and Inter-Digit Blanking
A F B
G
E D
C DP
Table 9. Code-B Font 7-Segment Character 0 1 2 3 4 5 Register Data D7
On Segments = 1 D1 0 0 1 1 0 0 D0 0 1 0 1 0 1 DP
D6:D4 X X X X X X
D3 0 0 0 0 0 0
D2 0 0 0 0 1 1
A 1 0 1 1 0 1
B 1 1 1 1 1 0
C 1 1 0 1 1 1
D 1 0 1 1 0 1
E 1 0 1 0 0 0
F 1 0 0 0 1 1
G 0 0 1 1 1 1
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AS1108 Data Sheet
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Digit- and Control-Registers
Table 9. Code-B Font (Continued) 7-Segment Character 6 7 8 9 E H L P Blank
Register Data D7
On Segments = 1 D1 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 DP
D6:D4 X X X X X X X X X X
D3 0 0 1 1 1 1 1 1 1 1
D2 1 1 0 0 0 0 1 1 1 1
A 1 1 1 1 0 1 0 0 1 0
B 0 1 1 1 0 0 1 0 1 0
C 1 1 1 1 0 0 1 0 0 0
D 1 0 1 1 0 1 0 1 0 0
E 1 0 1 0 0 1 1 1 1 0
F 1 0 1 1 0 1 1 1 1 0
G 1 0 1 1 1 1 1 0 1 0
The decimal point is enabled by setting bit D7 = 1.
Table 10. HEX Font 7-Segment Character 0 1 2 3 4 5 6 7 8 9 A b C d E F
Register Data D7
On Segments = 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DP
D6:D4 X X X X X X X X X X X X X X X X
D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
A 1 0 1 1 0 1 1 1 1 1 1 0 1 0 1 1
B 1 1 1 1 1 0 0 1 1 1 1 0 0 1 0 0
C 1 1 0 1 1 1 1 1 1 1 1 1 0 1 0 0
D 1 0 1 1 0 1 1 0 1 1 0 1 1 1 1 0
E 1 0 1 0 0 0 1 0 1 0 1 1 1 1 1 1
F 1 0 0 0 1 1 1 0 1 1 1 1 1 0 1 1
G 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 1
The decimal point is enabled by setting bit D7 = 1.
Table 11. No-Decode Mode Data Bits and Corresponding Segment Lines Corresponding Segment Line D7 DP D6 A D5 B D4 C D3 D D2 E D1 F D0 G
Display-Test Register (0xXF)
The AS1108 can operate in two modes: normal mode and display test mode. In display test mode all LEDs are switched on at maximum brightness (duty cycle is 15/16). The device remains in display-test mode until the DisplayTest Register is set for normal operation. Note: All settings of the Digit- and Control-Registers are maintained. Table 12. Display-Test Register Format (Address (HEX) = 0xXF)) Mode Normal Operation Display Test Mode D7 X X D6 X X D5 X X Register Data D4 D3 X X X X D2 X X D1 X X D0 0 1
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Digit- and Control-Registers
Intensity Control Register (0xXA)
The brightness of the display can be controlled by digital means using the Intensity Control Register and by analog means using RSET (see Selecting RSET Resistor Value and Using External Drivers on page 12). Display brightness is controlled by an integrated pulse-width modulator which is controlled by the lower-nibble of the Intensity Control Register. The modulator scales the average segment-current in 16 steps from a maximum of 31/32 down to 1/32 of the peak current set by RSET. Table 13. Intensity Register Format (Address (HEX) = 0xXA)) Duty Cycle AS1108 1/32 (min on) 3/32 5/32 7/32 9/32 11/32 13/32 15/32 17/32 19/32 21/32 23/32 25/32 27/32 29/32 31/32 (max on) HEX Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 0xX8 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF D7 X X X X X X X X X X X X X X X X D6 X X X X X X X X X X X X X X X X D5 X X X X X X X X X X X X X X X X Register Data D4 D3 X 0 X 0 X 0 X 0 X 0 X 0 X 0 X 0 X 1 X 1 X 1 X 1 X 1 X 1 X 1 X 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Scan-Limit Register (0x0B)
The Scan-Limit Register controls which of the digits are to be displayed. When all 4 digits are to be displayed, the update frequency is typically 1600Hz. If the number of digits displayed is reduced, the update frequency is increased. The frequency can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the brightness, RSET should be adjusted accordingly. Table 15 lists the maximum allowed current when fewer than 4 digits are used. Note: To avoid differences in brightness this register should not be used to blank parts of the display (leading zeros). Table 14. Scan-Limit Register Format (Address (HEX) = 0xXB)) Scan Limit Display digit 0 only (see Table 15) Display digits 0:1 (see Table 15) Display digits 0:2 (see Table 15) Display digits 0:3 HEX Code 0xX0 0xX1 0xX2 0xX3 D7 X X X X D6 X X X X D5 X X X X Register Data D4 D3 X X X X X X X X D2 0 0 0 0 D1 0 0 1 1 D0 0 1 0 1
Table 15. Maximum Segment Current for 1-, 2-, or 3-Digit Displays Number of Digits Displayed 1 2 3 Maximum Segment Current (mA) 10 20 30
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AS1108 Data Sheet
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Digit- and Control-Registers
Feature Register (0xXE)
The Feature Register is used for switching the device into external clock mode, applying an external reset, selecting code-B or HEX decoding, enabling or disabling blinking, enabling or disabling the SPI-compatible interface, setting the blinking rate, and resetting the blink timing. Note: At power-up the Feature Register is initialized to 0. Table 16. Feature Register Summary D7 blink_ start D6 sync D5 blink_ freq_sel D4 blink_en D3 spi_en D2 decode_sel D1 reg_res D0 clk_en
Table 17. Feature Register Bit Descriptions (Address (HEX) = 0xXE)) Addr: 0xXE Bit D0 Feature Register Enables and disables various device features. Bit Name Default Access Bit Description External clock select. clk_en 0 R/W 0 = Internal oscillator is used for system clock. 1 = Pin CLK of the serial interface operates as system clock input. Resets all control registers except the Feature Register. 0 = Reset Disabled. Normal operation. reg_res 1 = All control registers are reset to default state (except the Feature 0 R/W Register) identically after power-up. Note: The Digit Registers maintain their data. Selects display decoding. 0 = Enable Code-B decoding (see Table 9 on page 8). decode_sel 0 R/W 1 = Enable HEX decoding (see Table 10 on page 9). Enables the SPI-compatible interface. spi_en 0 R/W 0 = Disable SPI-compatible interface. 1 = Enable the SPI-compatible interface. Enables blinking. blink_en 0 = Disable blinking. 0 R/W 1 = Enable blinking. Sets blink with low frequency (with the internal oscillator enabled): 0 = Blink period typically is 1 second (0.5s on, 0.5s off). blink_freq_sel 0 R/W 1 = Blink period is 2 seconds (1s on, 1s off). Synchronizes blinking on the rising edge of pin LOAD/CSN. The multiplex and blink timing counter is cleared on the rising edge of pin sync 0 R/W LOAD/CSN. By setting this bit in multiple AS1108 devices, the blink timing can be synchronized across all the devices. Start Blinking with display enabled phase. When bit D4 (blink_en) is set, bit D7 determines how blinking starts. blink_start 0 R/W 0 = Blinking starts with the display turned off. 1 = Blinking starts with the display turned on.
D1
D2
D3
D4
D5
D6
D7
No-Op Register (0xX0)
The No-Op Register is used when multiple AS1108 devices are cascaded in order to support displays with more than 4 digits. The cascading must be done in such a way that all DOUT pins are connected to DIN of the next AS1108 (see Figure 11 on page 14). The LOAD/CSN and CLK signals are connected to all devices. For example, if five devices are cascaded, in order to perform a write operation to the fifth device, the write-command must be followed by four no-operation commands. When the LOAD/CSN signal goes high, all shift registers are latched. The first four devices will receive no-operation commands and only the fifth device will receive the intended operation command, and subsequently update its register.
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AS1108 Data Sheet
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Supply Bypassing and Wiring
8 Typical Application
Supply Bypassing and Wiring
In order to achieve optimal performance the AS1108 should be placed very close to the LED display to minimize effects of electromagnetic interference and wiring inductance. Furthermore, a 10F electrolytic and a 0.1F ceramic capacitor should be connected between pins VDD and GND to avoid power supply ripple (see Figure 11 on page 14). Note: Both GND pins must be connected to ground.
Selecting RSET Resistor Value and Using External Drivers
Brightness of the display segments is controlled via RSET. The current that flows between VDD and ISET defines the current that flows through the LEDs. Segment current is about 200 times the current in ISET. Typical values for RSET for different segment currents, operating voltages, and LED voltage drop (VLED) are given in Tables 18 - 22. The maximum current the AS1108 can drive is 40mA. If higher currents are needed, external drivers must be used, in which case it is no longer necessary that the device drive high currents. In cases where the device drives only a few digits, Table 15 specifies the maximum currents, and RSET must be set accordingly. Note: The display brightness can also be logically controlled (see Selecting RSET Resistor Value and Using External Drivers on page 12). Table 18. RSET vs. Segment Current and LED Forward Voltage, VDD = 2.7V ISEG (mA) 40 30 20 10 VLED(V) 1.5 5k 6.9k 10.7k 22.2k 2.0 4.4k 5.9k 9.6k 20.7k
Table 19. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.3V ISEG (mA) 40 30 20 10 1.5 6.7k 9.1k 13.9k 28.8k VLED(V) 2.0 6.4k 8.8k 13.3k 27.7k 2.5 5.7k 8.1k 12.6k 26k
Table 20. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.6V ISEG (mA) 40 30 20 10 VLED(V) 1.5 7.5k 10.18k 15.6k 31.9k 2.0 7.2k 9.8k 15k 31k 2.5 6.6k 9.2k 14.3k 29.5k 3.0 5.5k 7.5k 13k 27.3k
Table 21. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V ISEG (mA) 40 30 1.5 8.6k 11.6k 2.0 8.3k 11.2k VLED(V) 2.5 7.9k 10.8k 3.0 7.6k 9.9k 3.5 5.2k 7.8k
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Selecting RSET Resistor Value and Using External Drivers
Table 21. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V (Continued) ISEG (mA) 20 10 1.5 17.7k 36.89k 2.0 17.3k 35.7k VLED(V) 2.5 16.6k 34.5k 3.0 15.6k 32.5k 3.5 13.6k 29.1k
Table 22. RSET vs. Segment Current and LED Forward Voltage, VDD = 5.0V ISEG (mA) 40 30 20 10 VLED (V) 1.5 11.35k 15.4k 23.6k 48.9k 2.0 11.12k 15.1k 23.1k 47.8k 2.5 10.84k 14.7k 22.6k 46.9k 3.0 10.49k 14.4k 22k 45.4k 3.5 10.2k 13.6k 21.1k 43.8k 4.0 9.9k 13.1k 20.2k 42k
Table 23. Package Thermal Data Package 20 Narrow DIP 20 Wide SOIC Thermal Resistance (JA) +75C/W +85C/W
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AS1108 Data Sheet
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4x8 LED Dot Matrix Driver
4x8 LED Dot Matrix Driver
The application example in Figure 11 shows the AS1108 as a 4x8 LED dot matrix driver. The LED columns have common cathodes and are connected to the DIG0:3 outputs. The rows are connected to the segment drivers. Each of the 32 LEDs can be addressed separately. The columns are selected via the digits as listed in Table 6 on page 7. The Decode Enable Register (see page 8) must be set to `00000000' as described in Table 8 on page 8. Single LEDs in a column can be addressed as described in Table 11 on page 9, where bit D0 corresponds to segment G and bit D7 corresponds to segment DP. Note: For a multiple-digit dot matrix, multiple AS1108 devices must be cascaded. Figure 11. Application Example as LED Dot Matrix Driver
4x8 LED Dot Matrix Diode Arrangement SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP 4x8 LED Dot Matrix
SEG A:G DIG0:3 SEG DP DOUT
AS1108
SEG A:G DIG0:3 SEG DP
AS1108
DIN MicroProcessor LOAD/CSN CLK GND
VDD
VBAT 9.53k
DIN LOAD/CSN CLK GND
VDD
VBAT 9.53k
ISET GND
ISET GND
Cascading Drivers
If more than 4 digits or 32 LEDs are needed, it is recommended to use the AS1106/AS1107, although several AS1108 devices can be cascaded. The example in Figure 4 drives 2 dot matrix digits using a 4-wire microprocessor interface. All Scan-Limit Registers should be set to the same value so that one display will not appear brighter than the other. For example, to display 6 digits, set both Scan-Limit Registers to display 3 digits so that both displays have a 1/3 duty cycle per digit. If 5 digits are needed, set both Scan-Limit Registers to display 3 digits and leave one digit unconnected. Otherwise, if one driver is set to display 3 digits and the other to display 2 digits one display will appear brighter because its duty cycle per digit will be 1/2 and the other display's duty cycle will be 1/3. Note: Refer to No-Op Register (0xX0) on page 11 for additional information.
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AS1108 Data Sheet
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Pin Assignments
9 Pinout and Packaging
Pin Assignments
Figure 12. DIP and SO Pin Assignments (Top View)
DOUT 1 DIN 2 DIG 0 3 GND 4 DIG 2 5 DIG 3 6 GND 7 DIG 1 8 LOAD/CSN 9 CLK 10 20 SEG D 19 SEG DP 18 SEG E 17 SEG C 16 VDD 15 ISET 14 SEG G 13 SEG B 12 SEG F 11 SEG A
AS1108
Pin Descriptions
Table 24. Pin Descriptions Pin Name DOUT DIN DIG 0:DIG 3 GND Pin Number 1 Description
LOAD/CSN
CLK
SEG A:SEG G, SEG DP
ISET VDD
Serial-Data Output. The data into pin DIN is valid at pin DOUT 16.5 clock cycles later. This pin is used to daisy-chain several AS1108 devices and is never high-impedance. Serial-Data Input. Data is loaded into the internal 16-bit shift register on the 2 rising edge of pin CLK. Digit Drive Lines. 4 four-digit drive lines that sink current from the display 3, 5, 6, 8 common cathode. The AS1108 pulls the digit outputs to VDD when turned off. 4, 7 Ground. Both GND pins must be connected. Load-Data Input. The last 16 bits of serial data are latched on the rising edge of this pin. 9 Chip-Select Input (AS1108 SPI-enabled only). Serial data is loaded into the shift register while this pin is low. The last 16 bits of serial data are latched on the rising edge of this pin. Serial-Clock Input. 10MHz maximum rate. Data is shifted into the internal shift register on the rising edge of this pin. Data is clocked out of DOUT on 10 the falling edge of this pin. On the AS1108 SPI-enabled, the CLK input is active only while pin LOAD/CSN is low. 11, 12, 13, Seven Segment and Decimal Point Drive Lines. 8 seven-segment drives 14, 17, 18, and decimal point drive that source current to the display. When a segment 19, 20 driver is turned off it is pulled to GND. Set Segment Current. Connect to VDD through RSET to set the peak 15 segment current (see Selecting RSET Resistor Value and Using External Drivers on page 12). 16 Positive Supply Voltage. Connect to +2.7 to +5.5V supply.
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AS1108 Data Sheet
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Package Drawings and Markings
Package Drawings and Markings
The AS1108 is available in a 20-pin DIP and a 20-pin SOIC package. Figure 13. 20-pin DIP Package
Symbol A A1 A2 b b1 b2 c c1 D D1 E E1 e eA eB eC L N Q1
Inches Min .015 .115 0.15 0.14 0.55 .008 .008 1.025 .030 .300 .240 .252 .100 BSC .300 BSC .430 .000 .125 20 .055 .060 .065 .060 .135 .130 0.18 0.18 0.60 .010 .010 1.030 .035 .195 0.22 0.20 0.65 .012 .011 1.035 .040 .325 .260 Nom Max .210
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AS1108 Data Sheet
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Package Drawings and Markings
Figure 14. 20-pin SOIC Package
Notes: 1. Lead coplanarity should be 0 to 0.10mm (.004") max. 2. Package surface finishing: (2.1) Top: matte (charmilles #18-30). (2.2) All sides: matte (charmilles #18-30). (2.3) Bottom: smooth or matte (charmilles #18-30). 3. All dimensions exclusive of mold flash, and end flash from the package body shall not exceed 0.24mm (0.10") per side (D). Symbol
A A1 A2 B C e H h J K L R ZD
Millimeters Min
2.44 0.10 2.24 0.36 0.23 10.11 0.31 0.53 7 BSC 0.51 0.63 0 1.01 0.89 8
Max
2.64 0.30 2.44 0.46 0.32 10.51 0.71 0.73
1.27 BSC
0.66 REF
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AS1108 Data Sheet
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10 Ordering Information
The AS1108 is available in a 20-pin DIP and a 20-pin SOIC package. Table 25. Ordering Information Part AS1108PL AS1108WL AS1108WL-T Temperature Range 0 to +70C 0 to +70C 0 to +70C Delivery Form Tubes Tubes Tape and Reel Package 20-pin Narrow Plastic DIP, Pb-free 20-pin Wide SO, Pb-free 20-pin Wide SO, Pb-free
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AS1108 Data Sheet
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Copyrights
Copyright (c) 1997-2005, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered (R). All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 e-mail: info@austriamicrosystems.com For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com
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